Gitweb: http://git.kernel.org/linus/b4e8f0b6eaa1e99f1a64e539466a8ee2fb521d62
Commit: b4e8f0b6eaa1e99f1a64e539466a8ee2fb521d62
Parent: 61053fdedb2080dadc18dc37abbba90d2e74bc03
Author: Mauro Carvalho Chehab <mchehab@redhat.com>
AuthorDate: Wed Sep 2 23:49:59 2009 -0300
Committer: Mauro Carvalho Chehab <mchehab@redhat.com>
CommitDate: Mon May 10 11:44:56 2010 -0300
i7core_edac: Use Device 3 function 2 to report errors with RDIMM's
Nehalem and upper chipsets provide an special device that has corrected memory
error counters detected with registered dimms. This device is only seen if
there are registered memories plugged.
After this patch, on a machine fully equiped with RDIMM's, it will use the
Device 3 function 2 to count corrected errors instead on relying at mcelog.
For unregistered DIMMs, it will keep the old behavior, counting errors
via mcelog.
This patch were developed together with Keith Mannthey <kmannth@us.ibm.com>
Signed-off-by: Keith Mannthey <kmannth@us.ibm.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
---
drivers/edac/i7core_edac.c | 208 +++++++++++++++++++++++++++++++++++++-------
1 files changed, 178 insertions(+), 30 deletions(-)
diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c
index 87d5695..4758c20 100644
--- a/drivers/edac/i7core_edac.c
+++ b/drivers/edac/i7core_edac.c
@@ -73,6 +73,18 @@
#define DIMM1_COR_ERR(r) (((r) >> 16) & 0x7fff)
#define DIMM0_COR_ERR(r) ((r) & 0x7fff)
+/* OFFSETS for Device 3 Function 2, as inicated on Xeon 5500 datasheet */
+#define MC_COR_ECC_CNT_0 0x80
+#define MC_COR_ECC_CNT_1 0x84
+#define MC_COR_ECC_CNT_2 0x88
+#define MC_COR_ECC_CNT_3 0x8c
+#define MC_COR_ECC_CNT_4 0x90
+#define MC_COR_ECC_CNT_5 0x94
+
+#define DIMM_TOP_COR_ERR(r) (((r) >> 16) & 0x7fff)
+#define DIMM_BOT_COR_ERR(r) ((r) & 0x7fff)
+
+
/* OFFSETS for Devices 4,5 and 6 Function 0 */
#define ...
