On Thu, Oct 30, 2008 at 12:20:30AM -0700, Jens Axboe wrote:
quoted text
> > @@ -76,6 +72,11 @@ static void generic_exec_single(int cpu, struct call_single_data *data)
> >  	list_add_tail(&data->list, &dst->list);
> >  	spin_unlock_irqrestore(&dst->lock, flags);
> >  
> > +	/*
> > +	 * Make the list addition visible before sending the ipi.
> > +	 */
> > +	smp_mb();
> > +
> >  	if (ipi)
> >  		arch_send_call_function_single_ipi(cpu);
> 
> We can downgrade this to a smp_wmb().

No. We want the ipi receiver to see the new consistent data rather than possible
old consistent data.

And on x86, smp_wmb() is a simple barrier() (in !CONFIG_X86_OOSTORE) and
which doesn't do much in this case.

on x86 mfence (smp_mb()) will ensure that msr based APIC (x2apic) accesses (ipi)
will be visible only after the memory operations before smp_mb() are made
visible.

thanks,
suresh
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