On Mon, 2008-11-10 at 15:35 +0800, KOSAKI Motohiro wrote:
quoted text > > > > As far as I know, barriers don't cause changes to be visible on oth=
er
quoted text > > > > CPUs faster too. It just guarantees corresponding operations after =
will
quoted text > > > > not get executed until that before have finished. And, I don't thin=
k we
quoted text > > > > need make changes to be visible on other CPUs faster.
> > >=20
> > > You're correct that barrier() has no impact on other CPUs. wmb() and=
rmb() do.=20
quoted text > > > If we don't need to make changes visible any faster, what's the poi=
nt in using=20
quoted text > > > atomic_set()? It's not any less racy. atomic_inc() and atomic_dec()=
would be=20
quoted text > > > less racy, but you're not using those.
> >=20
> > In default bust_spinlocks() implementation in lib/bust_spinlocks.c,
> > atomic_inc() and atomic_dec_and_test() is used. Which is used by x86
> > too. In some other architecture, atomic_set() is used to replace
> > "oops_in_progress =3D <xxx>". So this patch fixes architectures which u=
se
quoted text > > default bust_spinlocks(), other architectures can be fixed by
> > corresponding architecture developers.
>=20
> I think Chris is right.
> So, I reccomend to read Documentation/memory-barriers.txt
>=20
> Almost architecture gurantee atomic_inc cause barrier implicitly.
> but not _all_ architecture.
Yes. atomic_inc() doesn't imply barrier on all architecture. But we
should not add barriers before all atomic_inc(), just ones needed. Can
you figure out which ones in the patch should has barrier added?
Best Regards,
Huang Ying
