login
Search
Hi Avi, Hi Marcelo,
here is a patch-set to make the instruction emulator aware of nested
virtualization. It basically works by introducing a new callback into
the x86_ops to check if a decoded instruction must be intercepted. If it
is intercepted the instruction emulator returns straight into the guest.
I am not entirely happy with this solution because it partially
duplicates the code in the x86_emulate_insn function. But there are so
many SVM specific cases that need to be taken care of that I consider
this solution the better one (even when looking at the diff-stat).
Keeping this (SVM-specific) complexity in the SVM specific code is
better than extending the generic instruction emulator code path.
The last patch removes the ugly hacks which were required without this
patch-set to correctly handle the selective-cr0-write intercept.
I appreciate your feedback.
Thanks,
Joerg
Diffstat:
arch/x86/include/asm/kvm_emulate.h | 2 +
arch/x86/include/asm/kvm_host.h | 3 +
arch/x86/kvm/svm.c | 330 ++++++++++++++++++++++++++++++------
arch/x86/kvm/vmx.c | 8 +
arch/x86/kvm/x86.c | 5 +
5 files changed, 297 insertions(+), 51 deletions(-)
Shortlog:
Joerg Roedel (9):
KVM: Add infrastructure to emulate instruction intercepts
KVM: SVM: Add checks for CRx read and write intercepts
KVM: SVM: Add checks for DRx read and write intercepts
KVM: SVM: Add intercept checks for descriptor table accesses
KVM: SVM: Add checks for all group 7 instructions
KVM: SVM: Add intercept checks for remaining twobyte instructions
KVM: SVM: Add intercept checks for one-byte instructions
KVM: SVM: Add checks for IO instructions
KVM: SVM: Remove nested sel_cr0_write handling code
--
This patch add intercept checks for emulated one-byte
instructions to the KVM instruction emulation path.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
arch/x86/kvm/svm.c | 36 +++++++++++++++++++++++++++++++++---
1 files changed, 33 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 77b344e..2a30b5b 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -3668,6 +3668,35 @@ static void svm_check_group7(struct vmcb *vmcb, struct x86_emulate_ctxt *ctxt)
}
}
+static void svm_check_onebyte(struct vmcb *vmcb, struct x86_emulate_ctxt *ctxt)
+{
+ struct decode_cache *c = &ctxt->decode;
+
+ switch (c->b) {
+ case 0x90: /* PAUSE */
+ if (c->rep_prefix == REPE_PREFIX)
+ vmcb->control.exit_code = SVM_EXIT_PAUSE;
+ break;
+ case 0x9c: /* PUSHF */
+ break;
+ case 0x9d: /* POPF */
+ vmcb->control.exit_code = SVM_EXIT_POPF;
+ break;
+ case 0xcd: /* INTn */
+ vmcb->control.exit_code = SVM_EXIT_SWINT;
+ break;
+ case 0xcf: /* IRET */
+ vmcb->control.exit_code = SVM_EXIT_IRET;
+ break;
+ case 0xf1: /* ICEBP */
+ vmcb->control.exit_code = SVM_EXIT_ICEBP;
+ break;
+ case 0xf4: /* HLT */
+ vmcb->control.exit_code = SVM_EXIT_HLT;
+ break;
+ }
+}
+
static int svm_insn_intercepted(struct kvm_vcpu *vcpu,
struct x86_emulate_ctxt *ctxt)
{
@@ -3681,8 +3710,10 @@ static int svm_insn_intercepted(struct kvm_vcpu *vcpu,
ret = X86EMUL_CONTINUE;
- if (!c->twobyte)
+ if (!c->twobyte) {
+ svm_check_onebyte(vmcb, ctxt);
goto out;
+ }
switch (c->b) {
case 0x00:
@@ -3799,14 +3830,13 @@ static int svm_insn_intercepted(struct kvm_vcpu *vcpu,
break;
}
+out:
vmcb->control.next_rip = ctxt->eip;
vmexit = nested_svm_exit_handled(svm);
ret = (vmexit == NESTED_EXIT_DONE) ? X86EMUL_INTERCEPTED
: X86EMUL_CONTINUE;
-out:
-
return ret;
}
--
1.7.1
--
This patch adds intercepts checks for the remaining twobyte instructions to the KVM instruction emulator. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> --- arch/x86/kvm/svm.c | 29 +++++++++++++++++++++++++++++ 1 files changed, 29 insertions(+), 0 deletions(-) diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c index 7284193..77b344e 100644 --- a/arch/x86/kvm/svm.c +++ b/arch/x86/kvm/svm.c @@ -3741,10 +3741,19 @@ static int svm_insn_intercepted(struct kvm_vcpu *vcpu, break; } + case 0x07: /* INVLPG */ + vmcb->control.exit_code = SVM_EXIT_INVLPG; + break; } case 0x06: /* CLTS */ vmcb->control.exit_code = SVM_EXIT_WRITE_CR0; break; + case 0x08: /* INVD */ + vmcb->control.exit_code = SVM_EXIT_INVD; + break; + case 0x09: /* WBINVD */ + vmcb->control.exit_code = SVM_EXIT_WBINVD; + break; case 0x20: /* CR read */ vmcb->control.exit_code = SVM_EXIT_READ_CR0 + c->modrm_reg; break; @@ -3768,6 +3777,26 @@ static int svm_insn_intercepted(struct kvm_vcpu *vcpu, case 0x23: vmcb->control.exit_code = SVM_EXIT_WRITE_DR0 + c->modrm_reg; break; + case 0x30: /* WRMSR */ + vmcb->control.exit_code = SVM_EXIT_MSR; + vmcb->control.exit_info_1 = 1; + break; + case 0x31: /* RDTSC */ + vmcb->control.exit_code = SVM_EXIT_RDTSC; + break; + case 0x32: /* RDMSR */ + vmcb->control.exit_code = SVM_EXIT_MSR; + vmcb->control.exit_info_1 = 0; + break; + case 0x33: /* RDPMC */ + vmcb->control.exit_code = SVM_EXIT_RDPMC; + break; + case 0xa2: /* CPUID */ + vmcb->control.exit_code = SVM_EXIT_CPUID; + break; + case 0xaa: /* RSM */ + vmcb->control.exit_code = SVM_EXIT_RSM; + break; } vmcb->control.next_rip = ctxt->eip; -- 1.7.1 --
This patch adds intercept checks for all the group 7
instructions to the KVM instruction emulator path.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
arch/x86/kvm/svm.c | 53 +++++++++++++++++++++++++++++++++++++++++++++++++++-
1 files changed, 52 insertions(+), 1 deletions(-)
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 035c5b5..7284193 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -3619,6 +3619,55 @@ static void svm_fpu_deactivate(struct kvm_vcpu *vcpu)
update_cr0_intercept(svm);
}
+static void svm_check_group7(struct vmcb *vmcb, struct x86_emulate_ctxt *ctxt)
+{
+ struct decode_cache *c = &ctxt->decode;
+
+ switch (c->modrm_rm) {
+ case 0:
+ switch (c->modrm_reg) {
+ case 1:
+ vmcb->control.exit_code = SVM_EXIT_MONITOR;
+ break;
+ case 3:
+ vmcb->control.exit_code = SVM_EXIT_VMRUN;
+ break;
+ }
+ break;
+ case 1:
+ switch (c->modrm_reg) {
+ case 1:
+ vmcb->control.exit_code = SVM_EXIT_MWAIT;
+ break;
+ case 3:
+ vmcb->control.exit_code = SVM_EXIT_VMMCALL;
+ break;
+ case 7:
+ vmcb->control.exit_code = SVM_EXIT_RDTSCP;
+ break;
+ }
+ break;
+ case 2:
+ vmcb->control.exit_code = SVM_EXIT_VMLOAD;
+ break;
+ case 3:
+ vmcb->control.exit_code = SVM_EXIT_VMSAVE;
+ break;
+ case 4:
+ vmcb->control.exit_code = SVM_EXIT_STGI;
+ break;
+ case 5:
+ vmcb->control.exit_code = SVM_EXIT_CLGI;
+ break;
+ case 6:
+ vmcb->control.exit_code = SVM_EXIT_SKINIT;
+ break;
+ case 7:
+ vmcb->control.exit_code = SVM_EXIT_INVLPGA;
+ break;
+ }
+}
+
static int svm_insn_intercepted(struct kvm_vcpu *vcpu,
struct x86_emulate_ctxt *ctxt)
{
@@ -3654,8 +3703,10 @@ static int svm_insn_intercepted(struct kvm_vcpu *vcpu,
break;
case 0x01:
/* 0x0f 0x01 and modrm_mod == 3 encodes special instructions */
- if (c->modrm_mod == 3)
+ if (c->modrm_mod == 3) {
+ svm_check_group7(vmcb, ctxt);
break;
+ }
switch (c->modrm_reg) {
case 0x00: /* SGDT */
-- ...This patch adds code to check for IOIO intercepts on
instructions decoded by the KVM instruction emulator.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
arch/x86/kvm/svm.c | 55 ++++++++++++++++++++++++++++++++++++++++++++++++++++
1 files changed, 55 insertions(+), 0 deletions(-)
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 2a30b5b..a2c513d 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -3668,6 +3668,47 @@ static void svm_check_group7(struct vmcb *vmcb, struct x86_emulate_ctxt *ctxt)
}
}
+static void svm_check_ioio(struct vmcb *vmcb, struct x86_emulate_ctxt *ctxt)
+{
+ struct decode_cache *c;
+ u32 bytes, seg;
+ u32 exit_info;
+
+ c = &ctxt->decode;
+ /* Encode Port */
+ exit_info = (c->regs[VCPU_REGS_RDX] & 0xffff) << 16;
+ seg = 0;
+
+ /* Encode Address Size */
+ exit_info |= (u32)c->ad_bytes << (SVM_IOIO_ASIZE_SHIFT - 1);
+
+ if (c->rep_prefix)
+ exit_info |= SVM_IOIO_REP_MASK;
+
+ if ((c->b & 0x06) == 0x06) {
+ /* OUT* Instruction */
+ bytes = c->dst.bytes;
+ } else {
+ /* IN* Instruction */
+ bytes = c->src.bytes;
+ exit_info |= SVM_IOIO_TYPE_MASK;
+ }
+
+ /* Encode Data Size */
+ bytes = min(bytes, 4u);
+ exit_info |= bytes << SVM_IOIO_SIZE_SHIFT;
+
+ /* Check for the string variants */
+ if ((c->b & 0xf0) == 0x60) {
+ exit_info |= SVM_IOIO_STR_MASK;
+ exit_info |= (seg & 0x07) << 10;
+ }
+
+ vmcb->control.exit_info_1 = exit_info;
+ vmcb->control.exit_info_2 = ctxt->eip;
+ vmcb->control.exit_code = SVM_EXIT_IOIO;
+}
+
static void svm_check_onebyte(struct vmcb *vmcb, struct x86_emulate_ctxt *ctxt)
{
struct decode_cache *c = &ctxt->decode;
@@ -3685,6 +3726,20 @@ static void svm_check_onebyte(struct vmcb *vmcb, struct x86_emulate_ctxt *ctxt)
case 0xcd: /* INTn */
vmcb->control.exit_code = SVM_EXIT_SWINT;
break;
+ case 0x6c: /* INS */
+ case 0x6d:
+ case 0xe4: /* IN */
+ case 0xe5:
+ case 0xec:
+ case 0xed:
+ case 0x6e: /* OUTS */
+ case ...This patch add code to check for any CRx read, write, and
the selective-cr0 intercepts for instructions emulated in
software by KVM.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
arch/x86/kvm/svm.c | 73 +++++++++++++++++++++++++++++++++++++++++++++++++++-
1 files changed, 72 insertions(+), 1 deletions(-)
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index d1721c2..29f0491 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -3622,7 +3622,78 @@ static void svm_fpu_deactivate(struct kvm_vcpu *vcpu)
static int svm_insn_intercepted(struct kvm_vcpu *vcpu,
struct x86_emulate_ctxt *ctxt)
{
- return X86EMUL_CONTINUE;
+ struct decode_cache *c = &ctxt->decode;
+ struct vcpu_svm *svm = to_svm(vcpu);
+ struct vmcb *vmcb = svm->vmcb;
+ int vmexit, ret;
+
+ if (!is_nested(svm))
+ return X86EMUL_CONTINUE;
+
+ ret = X86EMUL_CONTINUE;
+
+ if (!c->twobyte)
+ goto out;
+
+ switch (c->b) {
+ case 0x01:
+ /* 0x0f 0x01 and modrm_mod == 3 encodes special instructions */
+ if (c->modrm_mod == 3)
+ break;
+
+ switch (c->modrm_reg) {
+ case 0x04: /* SMSW */
+ vmcb->control.exit_code = SVM_EXIT_READ_CR0;
+ break;
+ case 0x06: { /* LMSW */
+ u64 cr0, val;
+
+ vmcb->control.exit_code = SVM_EXIT_WRITE_CR0;
+
+ if (svm->nested.intercept_cr_write & INTERCEPT_CR0_MASK)
+ break;
+
+ /* check for selective-cr0 special case */
+ cr0 = vcpu->arch.cr0 & ~SVM_CR0_SELECTIVE_MASK & 0xf;
+ val = c->src.val & ~SVM_CR0_SELECTIVE_MASK & 0xf;
+
+ if (cr0 ^ val)
+ vmcb->control.exit_code = SVM_EXIT_CR0_SEL_WRITE;
+
+ break;
+ }
+ }
+ case 0x06: /* CLTS */
+ vmcb->control.exit_code = SVM_EXIT_WRITE_CR0;
+ break;
+ case 0x20: /* CR read */
+ vmcb->control.exit_code = SVM_EXIT_READ_CR0 + c->modrm_reg;
+ break;
+ case 0x22: /* CR write */
+ vmcb->control.exit_code = SVM_EXIT_WRITE_CR0 + c->modrm_reg;
+ if (c->modrm_reg == 0 &&
+ !(svm->nested.intercept_cr_write & INTERCEPT_CR0_MASK)) {
+ /* check for ...This patch adds the necessary infrastructure to KVM to
implement instruction intercepts when the vcpu in in
emulated guest mode.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
arch/x86/include/asm/kvm_emulate.h | 2 ++
arch/x86/include/asm/kvm_host.h | 3 +++
arch/x86/kvm/svm.c | 8 ++++++++
arch/x86/kvm/vmx.c | 8 ++++++++
arch/x86/kvm/x86.c | 5 +++++
5 files changed, 26 insertions(+), 0 deletions(-)
diff --git a/arch/x86/include/asm/kvm_emulate.h b/arch/x86/include/asm/kvm_emulate.h
index b48c133..3498431 100644
--- a/arch/x86/include/asm/kvm_emulate.h
+++ b/arch/x86/include/asm/kvm_emulate.h
@@ -54,6 +54,8 @@ struct x86_emulate_ctxt;
#define X86EMUL_RETRY_INSTR 3 /* retry the instruction for some reason */
#define X86EMUL_CMPXCHG_FAILED 4 /* cmpxchg did not see expected value */
#define X86EMUL_IO_NEEDED 5 /* IO is needed to complete emulation */
+#define X86EMUL_INTERCEPTED 6 /* VCPU is in guest mode and the
+ instruction is intercepted */
struct x86_emulate_ops {
/*
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 54e42c8..bcc781b 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -596,6 +596,9 @@ struct kvm_x86_ops {
void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
const struct trace_print_flags *exit_reasons_str;
+
+ int (*insn_intercepted)(struct kvm_vcpu *vcpu,
+ struct x86_emulate_ctxt *ctxt);
};
struct kvm_arch_async_pf {
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 2fd2f4d..d1721c2 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -3619,6 +3619,12 @@ static void svm_fpu_deactivate(struct kvm_vcpu *vcpu)
update_cr0_intercept(svm);
}
+static int svm_insn_intercepted(struct kvm_vcpu *vcpu,
+ struct x86_emulate_ctxt *ctxt)
+{
+ return X86EMUL_CONTINUE;
+}
+
static struct kvm_x86_ops svm_x86_ops = {
...My big worry is that it makes svm.c aware of internal emulator variable, I don't think there's a problem with svm specific code in the emulator for this. My reasoning is that there are two classes of svm code: the common one is using svm to implement kvm, and the other one is emulating the svm instruction set. Most of the current svm code belongs to the first class, even the nested svm code. For example the code that emulates VMRUN is kvm-specific, while the code that decides whether to #GP on VMRUN or not is generic. So I don't think there's a problem with coding the svm intercepts in emulate.c. This is no different than emulating any AMD-specific instruction in the emulator - we're emulating an instruction in exactly the way it is specified in the manual. Something you could do is allocate bits for the intercept bit number and exit code in opcode->flags. This way most unconditional intercepts happen outside the instruction switch: generic code reads the intercept bit, the intercept word (via a callback), if the bit is set, returns the exit code. That should completely kill the diffstat. We only need to be careful wrt the order of the intercept check and the other permission checks. -- I have a truly marvellous patch that fixes the bug which this signature is too narrow to contain. --
I don't think so, the structure of the code in svm.c follows the same structures (even in a simpler way) as in the x86_emulate_insn() function. Someone who changes the internal data structures of the emulator can easily change svm.c too. This person will even recognize the need for this automatically because svm.c will not compile anymore when the data structure is changed. On the other side, implementing this in the emulator itself would require a person to learn about very low-level svm internals to get everything right (or the changes easily break the code which is more That would make sense if the Nested-SVM code is implemented in the generic code so that it is usable from VMX too. But that is not the case We have a lot of intercepts where this does not work. There is no 1-1 mapping between an opcode and an intercept. Some opcodes can result in multiple different intercepts (mov cr, mov dr), sometimes multiple intructions result in one intercept (rdmsr/wrmsr, in/out). The later ones even need special handling because the differences between the different instructions are encoded in the exit_info fields. All this would expose svm-internals like the vmcb structure into the generic code. I think hacking all this in the emulator itself also makes it more complex than it is today and the changes will likely break at some point when somone hacks on the emulator. And the situation will not get better when Nested-VMX gets merged and needs to do the same. We basically have two choices here: a) We expose svm internals into the emulator b) We expose emulator internals into svm Both choices are not really good from a software-design point-of-view. But I think option b) is the better one because it is easier to cope with and thus less likely to break when changing the emulator code. Joerg -- AMD Operating System Research Center Advanced Micro Devices GmbH Einsteinring 24 85609 Dornach General Managers: Alberto Bozzo, Andrew Bowd Registration: Dornach, Landkr. ...
What we could do probably is to define the interface between the emulator and the architecture code in a better way. This would take the burden of going into architecture code for emulator changes away. The current patch-set only needs a subset of the decode-cache (in the future probably also a subset of the fetch-cache). We could put this information into a seperate struct and give it to the architecture code. I planned to make the guest_mode flag a generic x86 vcpu property anyway, so building this structure could be limited to instructions emulated while the vcpu is in guest mode thus avoiding the overhead for the default case. Joerg -- AMD Operating System Research Center Advanced Micro Devices GmbH Einsteinring 24 85609 Dornach General Managers: Alberto Bozzo, Andrew Bowd Registration: Dornach, Landkr. Muenchen; Registerger. Muenchen, HRB Nr. 43632 --
What about things like adding instructions and forgetting to add the corresponding svm.c code? Of course it can happen with everything in the emulator, but at least Good idea. Needed for the decode bits thing as well. -- error compiling committee.c: too many arguments to function --
Cannot happen. Every instruction that can be intercepted with SVM is Especially needed to not kill the L1 guest when an L2 instruction emulation fails :) Joerg -- AMD Operating System Research Center Advanced Micro Devices GmbH Einsteinring 24 85609 Dornach General Managers: Alberto Bozzo, Andrew Bowd Registration: Dornach, Landkr. Muenchen; Registerger. Muenchen, HRB Nr. 43632 --
(Sorry for late reply...) Call us back when Intel releases the i9 and i11 with new instructions that need intercept handling. ;)
It will quite possibly include instructions that can be intercepted with SVM that are not in this patch set. At which point Joerg's comment can apply - it will be possible to add it in one place and forget to add it in the svm.c code.
SVM is AMD-only. So if an instruction does not exist on AMD there will also be no specific intercept for it. For newly added instructions to the AMD ISA which can then be intercepted I have to do bringup work anyway. This will include adding these intercepts to the code in this patch-set. Joerg -- AMD Operating System Research Center Advanced Micro Devices GmbH Einsteinring 24 85609 Dornach General Managers: Alberto Bozzo, Andrew Bowd Registration: Dornach, Landkr. Muenchen; Registerger. Muenchen, HRB Nr. 43632 --
Eventually the emulator will be used outside kvm. We don't want to tie All that's needed is to read the svm chapter in the AMD manual; you don't need to understand kvm or out nested svm implementation. On the other hand, some information needs to be encoded in the emulator (the order of the intercept check vs exception check) or we need to duplicate Nested VMX could do the same thing. Sometimes the checks would be So they get special treatment. Decode bits are for the general case. Let's see: CRx/DRx checks - need group mechanism extension, can use decode bits Selective CR0 - special LIDT/SIDT/LGDT/SGDT/LLDT/SLDT/LTR/STR - decode bits RDTSC/RDPMC/CPUID - decode bits PUSHF/POPF/RSM/IRET/INTn - decode bits, + flag to check before exceptions INVD /HLT/INVLPG/INVLPGA - decode bits PAUSE - special VMRUN/VMLOAD/VMSAVE/VMMCALL/STGI/CLGI/SKINIT - decode bits (VMMCALL preempts exceptions) RDTSCP/ICEBP/WBINVD/MONITOR/MWAIT - decode bits IOIO/MSR - very special Exception intercepts - outside emulator So the majority (by far) can be handled by decode bits. Selective CR0, IOIO, MSR, and PAUSE need special handling, can be done via callbacks into kvm (and into vendor specific code). These will be useful for nested vmx as well. Come to think of it, CR0, IOIO, and MSR already have callbacks into kvm. So all we need to do is add X86EMUL_INTERCEPTED to the callback (provided it's at the right place in terms of intercept/exception svm specific infomation will have to be exposed anyway, because the checks need to be made in different places. That's especially true when the emulation itself can generate exceptions, you may have to redo the exception check in svm.c. -- error compiling committee.c: too many arguments to function --
Is that person also required to read through the 500 pages of VMX The CRx writes are mostly special because exceptions for validity of the values written take precedence over the intercept. Implementing these checks also requires to put the intercept check into the kvm_set_crX functions, which, by themselves, needs to be reworked in an SVM specific Exceptions are only caused on cpl > 0 and take precedence over the VMRUN/VMLOAD/VMSAVE need to check rax for a valid physical address before the intercept is taken. All SVM instructions are not allowed in real-mode which needs to be checkd too. The realmode-check may be generic but with the address check this is harder. So at least VMRUN/VMLOAD/VMSAVE are special too. Further the SVM instructions are not implemented in the emulator at all (like some other instructions which can be intercepted). Proper RDTSCP needs special handling like RDTSC. MONITOR is special too because it checks all exceptions before the intercept. All this can be done, but I doubt the result will look better or is better maintainable than the current the solution in this patch-set. Joerg -- AMD Operating System Research Center Advanced Micro Devices GmbH Einsteinring 24 85609 Dornach General Managers: Alberto Bozzo, Andrew Bowd Registration: Dornach, Landkr. Muenchen; Registerger. Muenchen, HRB Nr. 43632 --
We can have three checks, controlled by the decode bits:
// decode instruction
if ((c->d & SvmMask) == SvmInterceptBefore)
... do intercept check
// do privivilge level checks
if ((c->d & SvmMask) == SvmInterceptAfterPriv)
... do intercept check
// fetch operands
if ((c->d & SvmMask) == SvmInterceptAfterMemory)
Add a kvm_x86_ops callback for this (vmx as usual is pretty complicated
With proper infrastructure I think all the modifications needed will be
the three checks above and the decode bits (assuming the current
crx/drx/pio callbacks are in the right place).
--
I have a truly marvellous patch that fixes the bug which this
signature is too narrow to contain.
--
| Greg KH | Og dreams of kernels |
| Jens Axboe | [PATCH 31/33] Fusion: sg chaining support |
| Arnd Bergmann | Re: finding your own dead "CONFIG_" variables |
| Mark Brown | [PATCH 2/2] Subject: natsemi: Allow users to disable workaround for DspCfg reset |
| Tony Breeds | [LGUEST] Look in object dir for .config |
git: | |
| Brian Downing | Re: Git in a Nutshell guide |
| John Benes | Re: master has some toys |
| Matthias Lederhofer | [PATCH 4/7] introduce GIT_WORK_TREE to specify the work tree |
| Alexander Sulfrian | [RFC/PATCH] RE: git calls SSH_ASKPASS even if DISPLAY is not set |
| Junio C Hamano | Re: Rss produced by git is not valid xml? |
| Linux Kernel Mailing List | iSeries: fix section mismatch in iseries_veth |
| Linux Kernel Mailing List | ixbge: remove TX lock and redo TX accounting. |