On Wed, Jul 14, 2010 at 8:55 AM, Stephan Wolf

Ok, this makes sense. Bugs in the ATI chipset is why
'hpet_readback_cmp' exists in the first place. HOWEVER, clearly that
commit changed it to be about too few ATI chipsets.

So right now, for

 - PCI_DEVICE_ID_ATI_SBX00_SMBUS:
     force disable HPET MSI
     force HPET readback

 - PCI_DEVICE_ID_ATI_IXP400_SMBU
     force-enable HPET
     ...and than your patch makes it force HPET readback

but that doesn't actually make much sense in the bigger picture,
because there are other ATI chipsets that are related and presumably
also affected. What about IXP[23]00_SMBUS? And what about the IXP7
series (SBX00 is IXP6, afaik)?

So I get the feeling that this is incomplete, or at least needs
thinking about those other ATI chipsets too.

Thomas? And I added Andreas to the cc, maybe he knows what's up.

                        Linus
--

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Ok, I did not consider that msi is disabled at all on IXP400. Isn't it? 
Maybe that the reason why it is works for me.

Stephan
--

[ message continues ]

From: Linus Torvalds <torvalds@linux-foundation.org>

Right, so the original commit introducing the readback did it for all
ATI chipsets: 72d43d9bc9210d24d09202eaf219eac09e17b339. We've been
running fine with it so far modulo the Intel ICH9 issue.

I'll try to find out which chipsets are actually affected but in the
meantime we might want to do a temporary fix by enabling the readback
back(!) on all ATI chipsets so that we don't uncover anymore bugs like

He'll be back on Mo.

-- 
Regards/Gruss,
Boris.

Advanced Micro Devices GmbH
Einsteinring 24, 85609 Dornach
General Managers: Alberto Bozzo, Andrew Bowd
Registration: Dornach, Gemeinde Aschheim, Landkreis Muenchen
Registergericht Muenchen, HRB Nr. 43632

--

[ message continues ]

On Wed, Jul 14, 2010 at 11:11 AM, Borislav Petkov

That sounds like the right solution for now, yes.  Rather than make
the readback quirk depend on one particular SMBUS revision, make it
happen unconditionally for an AMD northbridge (or is the HPET in the
SB? I forget - somebody who knows the details and can test it on a
machine or two should do the actual patch).

Thomas?

                Linus
--

[ message continues ]

From: Linus Torvalds <torvalds@linux-foundation.org>

Yeah, its in the southbridge which is part of the chipset. Actually
we'll have to somehow match ATI chipsets only since we have also nVidia
chipsets with AMD cpus in them.


I'll try to cook up something unless someone beats me to it.

-- 
Regards/Gruss,
Boris.

Advanced Micro Devices GmbH
Einsteinring 24, 85609 Dornach
General Managers: Alberto Bozzo, Andrew Bowd
Registration: Dornach, Gemeinde Aschheim, Landkreis Muenchen
Registergericht Muenchen, HRB Nr. 43632

--

[ message continues ]

The patch below works on my collection of ATI chipset based machines.

Stefan, does it solve your problem too ?

Thanks,

	tglx
-----

Subject: x86-ati-chipsets-hpet-force-readback.patch
From: Thomas Gleixner <tglx@linutronix.de>
Date: Wed, 14 Jul 2010 21:36:27 +0200

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Index: linux-2.6/arch/x86/kernel/early-quirks.c
===================================================================
--- linux-2.6.orig/arch/x86/kernel/early-quirks.c
+++ linux-2.6/arch/x86/kernel/early-quirks.c
@@ -18,6 +18,7 @@
 #include <asm/apic.h>
 #include <asm/iommu.h>
 #include <asm/gart.h>
+#include <asm/hpet.h>
 
 static void __init fix_hypertransport_config(int num, int slot, int func)
 {
@@ -191,6 +192,21 @@ static void __init ati_bugs_contd(int nu
 }
 #endif
 
+/*
+ * Force the read back of the CMP register in hpet_next_event()
+ * to work around the problem that the CMP register write seems to be
+ * delayed. See hpet_next_event() for details.
+ *
+ * We do this on all SMBUS incarnations for now until we have more
+ * information about the affected chipsets.
+ */
+static void __init ati_hpet_bugs(int num, int slot, int func)
+{
+#ifdef CONFIG_HPET_TIMER
+	hpet_readback_cmp = 1;
+#endif
+}
+
 #define QFLAG_APPLY_ONCE 	0x1
 #define QFLAG_APPLIED		0x2
 #define QFLAG_DONE		(QFLAG_APPLY_ONCE|QFLAG_APPLIED)
@@ -220,6 +236,8 @@ static struct chipset early_qrk[] __init
 	  PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs },
 	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS,
 	  PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs_contd },
+	{ PCI_VENDOR_ID_ATI, PCI_ANY_ID,
+	  PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_hpet_bugs },
 	{}
 };
 
Index: linux-2.6/arch/x86/kernel/quirks.c
===================================================================
--- linux-2.6.orig/arch/x86/kernel/quirks.c
+++ linux-2.6/arch/x86/kernel/quirks.c
@@ -498,15 +498,10 @@ void force_hpet_resume(void)
  * See erratum #27 (Misinterpreted MSI Requests ...
[ message continues ]

Hi, the patch above solves the problem on my machine.

Thanks,
Stephan
--

[ message continues ]

Thanks for testing. 

Borislav, any opinion ?

Thanks,

	tglx
--

[ message continues ]

From: Thomas Gleixner <tglx@linutronix.de>

Yep, good idea to match SMBus device class on ATI, cool. Quickly tested
on my SB700.

Acked-by: Borislav Petkov <borislav.petkov@amd.com>

-- 
Regards/Gruss,
Boris.

Advanced Micro Devices GmbH
Einsteinring 24, 85609 Dornach
General Managers: Alberto Bozzo, Andrew Bowd
Registration: Dornach, Gemeinde Aschheim, Landkreis Muenchen
Registergericht Muenchen, HRB Nr. 43632

--

[ message continues ]

Commit-ID:  08be97962bf338161325d4901642f956ce8c1adb
Gitweb:     http://git.kernel.org/tip/08be97962bf338161325d4901642f956ce8c1adb
Author:     Thomas Gleixner <tglx@linutronix.de>
AuthorDate: Wed, 14 Jul 2010 21:36:27 +0200
Committer:  Thomas Gleixner <tglx@linutronix.de>
CommitDate: Thu, 15 Jul 2010 17:10:02 +0200

x86: Force HPET readback_cmp for all ATI chipsets

commit 30a564be (x86, hpet: Restrict read back to affected ATI
chipset) restricted the workaround for the HPET bug to SMX00
chipsets. This was reasonable as those were the only ones against
which we ever got a bug report.

Stephan Wolf reported now that this patch breaks his IXP400 based
machine. Though it's confirmed to work on other IXP400 based systems.

To error out on the safe side, we force the HPET readback workaround
for all ATI SMbus class chipsets.

Reported-by: Stephan Wolf <stephan@letzte-bankreihe.de>
LKML-Reference: <alpine.LFD.2.00.1007142134140.3321@localhost.localdomain>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Stephan Wolf <stephan@letzte-bankreihe.de>
Acked-by: Borislav Petkov <borislav.petkov@amd.com>
---
 arch/x86/kernel/early-quirks.c |   18 ++++++++++++++++++
 arch/x86/kernel/quirks.c       |    5 -----
 2 files changed, 18 insertions(+), 5 deletions(-)

diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index ebdb85c..e5cc7e8 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -18,6 +18,7 @@
 #include <asm/apic.h>
 #include <asm/iommu.h>
 #include <asm/gart.h>
+#include <asm/hpet.h>
 
 static void __init fix_hypertransport_config(int num, int slot, int func)
 {
@@ -191,6 +192,21 @@ static void __init ati_bugs_contd(int num, int slot, int func)
 }
 #endif
 
+/*
+ * Force the read back of the CMP register in hpet_next_event()
+ * to work around the problem that the CMP register write seems to be
+ * delayed. See hpet_next_event() for details.
+ *
+ * We do this on all SMBUS incarnations for now ...
[ message continues ]

It's in the SB. Need to figure out how to cover all ATI chipsets and
not blindly imposing this on any other chipset which is used with AMD
cpus.

Thanks,

	tglx
--

[ message continues ]

Hmpf. The only report I ever got was against SBX00 and I can reproduce
on my own machine. My IXP400_SMBUS box works fine without the
readback.

/me is confused
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