On Mon, Jan 3, 2011 at 8:52 AM, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
Yes, but currently operation capabilities are organized per dma device
(i.e. all channels on a dma device share the same set of
capabilities). The channel allocator will keep the chain on a single
channel where possible, but if it determines we need to switch to a
channel with a different capability set then we have also switched dma
devices at that point.
iop3xx and ppc4xx have this dma_device-per-dma_chan
organization.currently. They could switch to a model of hiding
multiple hw channels behind a single dma_chan, but then they would
need to handle the operation ordering and channel transitions
internally.
Yes, but the dma driver still does not have enough information to
determine when it is finally safe to unmap / allow speculative reads.
The raid driver can make a much cleaner guarantee of "this stripe now
belongs to a dma device" and "all dma operations have completed this
stripe can be returned to the cpu / rescheduled on a new channel".
We could disable the driver if NET_DMA or ASYNC_TX_DMA are selected.
That still allows the driver to be exercised with dmatest. Although
I notice the driver is already marked experimental, do we need
something stronger for 37-final?
--
Dan
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