Hi, I am submitting a patch to add core thermal threshold notification Support to therm_throt.c. These thresholds are supported by the IA32_THERM_INTERRUPT register. The status/log for the same is monitored using the IA32_THERM_STATUS register. The necessary #defines are in msr-index.h. A call back is added to mce.h, to further notify the thermal stack, about the threshold events. This patch is generated against stable Linux-2.6 kernel. Kindly review and merge. --------------------------------------------------------------------------------- From: Durgadoss R <durgadoss.r@intel.com> Date: Sun, 19 Dec 2010 22:42:45 +0530 Subject: [PATCH 1/2] X86:Adding_core_threshold_notification_to_therm_throt.c This patch adds code to therm_throt.c to notify core thermal threshold events. These thresholds are supported by the IA32_THERM_INTERRUPT register. The status/log for the same is monitored using the IA32_THERM_STATUS register. The necessary #defines are in msr-index.h. A call back is added to mce.h, to further notify the thermal stack, about the threshold events. Signed-off-by: Durgadoss R <durgadoss.r@intel.com> --- arch/x86/include/asm/mce.h | 3 ++ arch/x86/include/asm/msr-index.h | 12 +++++++++ arch/x86/kernel/cpu/mcheck/therm_throt.c | 40 ++++++++++++++++++++++++++++++ 3 files changed, 55 insertions(+), 0 deletions(-) diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h index c62c13c..eb16e94 100644 --- a/arch/x86/include/asm/mce.h +++ b/arch/x86/include/asm/mce.h @@ -223,6 +223,9 @@ void intel_init_thermal(struct cpuinfo_x86 *c); void mce_log_therm_throt_event(__u64 status); +/* Interrupt Handler for core thermal thresholds */ +extern int (*platform_thermal_notify)(__u64 msr_val); + #ifdef CONFIG_X86_THERMAL_VECTOR extern void mcheck_intel_therm_init(void); #else diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 3ea3dc4..a9de090 100644 --- ...
If this is just a resubmit, you might instead consider trying to figure out why none of the x86 maintainers replied. Documentation/Submit* might help, as well as comparing your set of patches with other (accepted) patches. If you made some changes, it would be expected to see the patch version and to list the changes made. As it is, the headline and description of your patches did not change for the last two (or three) submissions, so there is no easy way to determine if anything has changed, nor is it possible to identify the most recent version from the mailing list archive. Guenter --
This is a resubmission. I thought people might be on holidays..that's why resubmitted today. Anyway, I shall try to figure out the reason. Thanks for pointing it out Guenter.. Any comments on the hwmon patch 2/2 ? Thanks, Durga --
Not right now. Futile to spend more time on it unless the x86 changes are accepted. Guenter --
The x86 patch has been accepted. Please find the details below: Commit-ID: 9e76a97efd31a08cb19d0ba12013b8fb4ad3e474 Gitweb: http://git.kernel.org/tip/9e76a97efd31a08cb19d0ba12013b8fb4ad3e474 Author: R, Durgadoss <durgadoss.r@intel.com> AuthorDate: Mon, 3 Jan 2011 17:22:04 +0530 Committer: H. Peter Anvin <hpa@linux.intel.com> CommitDate: Mon, 3 Jan 2011 08:30:30 -0800 Could you please let me know your comments on the hwmon patch[2/2] ? Thanks, Durga --
Commit-ID: 9e76a97efd31a08cb19d0ba12013b8fb4ad3e474 Gitweb: http://git.kernel.org/tip/9e76a97efd31a08cb19d0ba12013b8fb4ad3e474 Author: R, Durgadoss <durgadoss.r@intel.com> AuthorDate: Mon, 3 Jan 2011 17:22:04 +0530 Committer: H. Peter Anvin <hpa@linux.intel.com> CommitDate: Mon, 3 Jan 2011 08:30:30 -0800 x86, hwmon: Add core threshold notification to therm_throt.c This patch adds code to therm_throt.c to notify core thermal threshold events. These thresholds are supported by the IA32_THERM_INTERRUPT register. The status/log for the same is monitored using the IA32_THERM_STATUS register. The necessary #defines are in msr-index.h. A call back is added to mce.h, to further notify the thermal stack, about the threshold events. Signed-off-by: Durgadoss R <durgadoss.r@intel.com> LKML-Reference: <D6D887BA8C9DFF48B5233887EF04654105C1251710@bgsmsx502.gar.corp.intel.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> --- arch/x86/include/asm/mce.h | 3 ++ arch/x86/include/asm/msr-index.h | 12 +++++++++ arch/x86/kernel/cpu/mcheck/therm_throt.c | 40 ++++++++++++++++++++++++++++++ 3 files changed, 55 insertions(+), 0 deletions(-) diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h index c62c13c..eb16e94 100644 --- a/arch/x86/include/asm/mce.h +++ b/arch/x86/include/asm/mce.h @@ -223,6 +223,9 @@ void intel_init_thermal(struct cpuinfo_x86 *c); void mce_log_therm_throt_event(__u64 status); +/* Interrupt Handler for core thermal thresholds */ +extern int (*platform_thermal_notify)(__u64 msr_val); + #ifdef CONFIG_X86_THERMAL_VECTOR extern void mcheck_intel_therm_init(void); #else diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 6b89f5e..622c80b 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -253,6 +253,18 @@ #define PACKAGE_THERM_INT_LOW_ENABLE (1 << 1) #define PACKAGE_THERM_INT_PLN_ENABLE (1 << 24) +/* Thermal Thresholds ...
Hi Peter, Thanks for accepting the patch. Thanks,
