On Fri, Apr 16, 2010 at 10:05:15AM -0400, jamal wrote:
You handle the packet like if rps wasn't enabled. softirq on current
CPU and it queues it on the socket.
The current CPU can queue on that socket as well.
The whole point of the IPI is to do it with cache locality.
But if cache locality is already there on the current CPU you don't
need the IPI.
No, the caches are always coherent.
Other CPUs have SMT too (Niagara, POWER 6/7, mips, ...). It should
be the same there.
Assuming L3 affinity helps it might need to be a CPU specific tunable
yes. The scheduler has some information about this.
-Andi
--
ak@linux.intel.com -- Speaking for myself only.
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